Clik here to view.
How Zen 2’s Op Cache Affects Performance
Banner image credit goes to Fritzchens Fritz and his amazing die shots Recent AMD and Intel high performance CPUs implement an op cache that remembers decoder output and functions like a L0...
View ArticleClik here to view.
ARM or x86? ISA Doesn’t Matter
For the past decade, ARM CPU makers have made repeated attempts to break into the high performance CPU market so it’s no surprise that we’ve seen plenty of articles, videos and discussions about ARM’s...
View ArticleClik here to view.
Measuring Zen 3’s Bottlenecks
Zen 3 is one of the fastest CPU cores currently on the market; that isn’t up for debate.However, even the fastest CPU cores have bottlenecks and today we are talking about the bottlenecks that Zen 3...
View ArticleClik here to view.
Neoverse N1 vs Zen 2: ARM in Practice
Previously, we looked at ARM and x86 and concluded high performance designs wouldn’t get a significant advantage by using either instruction set. That article focused narrowly on the respective ISAs,...
View ArticleClik here to view.
Details on the Gigabyte Leak
Recently, a ransomware group leaked data from Gigabyte in an attempt to extort payment. That’s been well covered by other outlets (please everyone, secure your networks), so here we’re focusing on Zen...
View ArticleClik here to view.
The Weird and Wacky World of VIA, the 3rd player in the “Modern” x86 market
Header Image credit goes to Martijn Boer. In the world of x86 CPUs there are two major players, Intel and AMD. However, there is one (well two but that will be expanded on later) other company that...
View ArticleClik here to view.
Analyzing Video Card Efficiency, Part I – Power
While most enthusiasts chase the absolute best performance at any cost, there are a few who use efficiency as their benchmark for a card’s attractiveness. It can be argued that the efficiency of a...
View ArticleClik here to view.
The Weird and Wacky World of VIA Part 2: Zhaoxin’s not quite Electric Boogaloo
In Part 1 of this piece we talked about the third x86 design house, VIA and more specifically VIA’s most recent commercially available architecture Isaiah. Today we are talking about the joint venture...
View ArticleClik here to view.
Do IBM’s Giant L3 and V-Cache Represent the Future?
IBM showed off a giant 256 MB L3 during its Telum presentation at Hot Chips 2021, and ignited discussion about whether that represents the future of caches. That’s not the first time we’ve seen big...
View ArticleClik here to view.
Deep Diving Neoverse N1
Our previous article gave a pretty narrow view of how Neoverse N1 and Zen 2 stacked up, and mostly focused on whether ISA was responsible for performance differences. Here, we’re going to analyze...
View ArticleClik here to view.
Zhaoxin Part 3: A Sort of Anti-Climax
I’ll be blunt here, this part will seem like an anti-climax compared to Part 2 of this series but I hope to nicely wrap up this series with this as the conclusion piece of what we know about how the...
View ArticleClik here to view.
Popping the Hood on Golden Cove
Alder Lake (ADL) is the most exciting Intel launch in more than half a decade. For the first time since Skylake, Intel has launched a competitive desktop microarchitecture. But I’m sure you all know...
View ArticleClik here to view.
Alder Lake – E-Cores, Ring Clock, and Hybrid Teething Troubles
This will be a short post about how Alder Lake’s ring behaves when E-Cores are active. With just P-Cores active, the ring runs at 4.7 GHz. But if anything is running on the E-Cores, the ring frequency...
View ArticleClik here to view.
Gracemont: Revenge of the Atom Cores
This article can be considered a part 2 to our Golden Cove article because today we are looking at the other core in Alder Lake, Gracemont. Which is in my opinion more interesting than Golden Cove...
View ArticleClik here to view.
Intel’s Tremont: Atom Changes Course
Today we’ll look at Intel’s Tremont architecture to put Gracemont in perspective. It’s Gracemont’s direct ancestor, and represents a shift in Intel’s Atom strategy. It delivers a massive 30%...
View ArticleClik here to view.
AMD’s V-Cache Tested: The Latency Teaser
If you were like us and were surprised that AMD announced 3D V-Cache back in August and wondered how AMD would be able to pull this off, well, we have a teaser article for you today regarding...
View ArticleClik here to view.
Deep Diving Zen 3 V-Cache
This is the deeper dive of AMD’s V-Cache that we teased with our short latency article and we will be covering a little more on the latency front along with the bandwidth behavior of V-Cache and the...
View ArticleClik here to view.
Alder Lake’s Power Efficiency – A Complicated Picture
Reviews across the internet show Alder Lake getting very competitive performance with very high power consumption. For example, Anandtech measured 272 W of package power during a POV-Ray run. Our own...
View ArticleClik here to view.
Going Armchair Quarterback on Golden Cove’s Caches
Processor speed has rapidly outpaced advances in DRAM technology, so caching strategy is a huge part of CPU performance today. A couple of articles ago, we saw Intel’s decisions with Golden Cove’s...
View ArticleState of Windows on Arm64: a high-level perspective
For a port of Windows to another architecture to be usable, a high level of backwards compatibility is needed to delight customers. Customer frustration has to be maintained at a minimum. Otherwise,...
View Article